The present invention relates to programmable machine controllers of the memory type and more particularly to arrangements for facilitating input/output, diagnostics and interprogram communications.
In several data processing and machine controller applications it is desired to have a plurality of programs operate independently from each other insofar as the respective program executions are concerned. However, each program may use signals common to other programs. In many apparatus the addressing of such common signals can require tables or unique addressing circuits to insure facile access to the common signals. Furthermore, if such common signals are used in connection with externally controlled diagnostics, input/output, and so forth, the external apparatus must accommodate such unique addressing or be constructed to operate in a manner consistent with the programming structure within the programmable controller or data processor connected to such external apparatus. In many such applications the internal programming arrangement of a programmable controller may change as features are added to the device being controlled, additional or fewer functions are performed in the entire system, or reprogramming is effected for reducing the size of memory required to contain the program signals. In moderate capability programmable controllers, the programming and hardware overhead of tables controlling I/O, etc. is to be avoided. That is, without memory zoning the number of address bits for each memory access increases and increases hardware costs. Programming around the zoning limitations also requires memory space and added memory costs.
Furthermore, a single machine may have diverse applications requiring diverse program structures or arrangements for maximizing efficiency of the programmable controller. In such diverse applications, the external diagnostic apparatus or other external apparatus would have to accommodate such diversity, hence increasing cost of the diagnostic tools as the programmable controller received wider usage.
The logical zoning of memory enables an instruction word to be used with fewer bits for addressing program memory as well as operand memory. Cost of data processing equipment has a direct relationship to the number of bits in an instruction word; that is, the longer the instruction word the more memory is required to contain the program and hence increases the cost of the data processor. Various techniques have been used for zoning memories. One so-called technique employs one byte of address field to be contained in an instruction word for accessing a certain portion or zone of memory. To access other zones so-called extended addressing techniques are used. That is, a special type of instruction may be required which contains two bytes of memory address for addressing the entire scope of memory. Using this technique, each instruction word used in connection with executing the program has one less byte of address field, thereby saving many bytes of program memory. Another form of zoning the memory is to use base plus or minus displacement addressing. In this system, an index or other form of register stores the base address to the full two-byte memory addressing field. The instruction word then contains only the displacement which is either added to or subtracted to from the signal contents of the index register. This type of addressing is also called index addressing. Another form of zoning is so-called relative addressing wherein a portion of the program counter is the base address and the instruction word contains the displacement (plus or minus) from the program address counter which defines the memory location of an operand to be fetched. Yet another form of addressing called paged addressing uses the upper byte of the program counter as defining the zone in memory to be accessed and the address field in the instruction word for the lower portion of the address bits. In accordance will all of the above, it is readily seen that zoning of memory is useful for saving program memory space at the expense of slower execution of programs, i.e., to switch zones. Extended addressing or other forms of control instructions or accessing between various zones of memory are required to be interleaved within the program of instructions.
It is highly desirable that programmable controllers and data processors be made program-structure independent for purposes of diagnostics and input/output connections. Such independence of program structure can facilitate construction and utilization of distributed processing systems.